Power Board plots for development model pcb.


Plot 0:
Ch1,Conv B FET gate
Ch3,Conv B FET drain
Ch4,Conv B source with 1R
Ch2,Conv A FET Gate



Plot 1:
Ch1,Conv B FET gate
Ch3,Conv A FET drain
Ch4,Conv A source with 1R
Ch2,Conv A FET Gate



Plot 2:
Ch1,Conv B FET gate
Ch3,Conv B FET drain
Ch4,Conv B pin one of primary winding
Ch2,Conv A FET Gate



Plot 3: .
Ch1,Conv B FET gate
Ch3,Conv A FET drain
Ch4,Conv A pin one of primary winding
Ch2,Conv A FET Gate



Plot 4: Ch3,Sync in Ch4,Sync out. Converters in phase.



Plot 5: Ch3,Sync in Ch4,Sync out. Converters out of phase.



Plot 6: Ch1,120V with 10n. Ch2,+5VA with 100n.



Plot 7: Same as Plot 6 but with fet switching, Ch3 ConvA and Ch2 ConvB.



Plot 8: Same as Plot 7 but different phase.



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Writen by Jason A Tandy 7/6/01